home *** CD-ROM | disk | FTP | other *** search
/ Resource for Source: C/C++ / Resource for Source - C-C++.iso / codelib7 / v_09_12 / 9n12086a < prev    next >
Encoding:
Text File  |  1995-11-01  |  6.1 KB  |  141 lines
  1. /** LISTING 5 ** UARTMACS.C **************************
  2.         Macro routines used by both
  3.         UARTLOW.C and UARTAPI.C
  4.  
  5. *****************************************************/
  6.  
  7.  
  8. /* The following two variables are required for the
  9.    IO_DELAY macro.  They will automatically be
  10.    defined as global to the including source file.
  11.    They are not system-wide global since the
  12.    interrupt driver and API functions could be 
  13.    utilizing them at the same time. */
  14. static unsigned char g_delay_char;            
  15. static unsigned char g_shift_char;            
  16.  
  17. /*****************************************************
  18. Chew up CPU cycles while I/O port catches up 
  19. *****************************************************/
  20. #define IO_DELAY(delay_loops) {                       \
  21.    for ( g_delay_char = 0 ;                           \
  22.          g_delay_char < delay_loops ;                 \
  23.          g_delay_char++)                              \
  24.        g_shift_char &= g_delay_char;                  \
  25. }
  26.  
  27.  
  28.       
  29. /*****************************************************
  30.   These macros all assume that a local variable 
  31.   p_cur_port_info points to the port info structure
  32.   of the port to be acted on.  They also assume the 
  33.   availability of a local register variable
  34.   value_from_port to use as scratch space.
  35.  
  36.   Also note the terminating \ on each line of the
  37.   macros (except for the closing brace) - it is 
  38.   required because Microsoft C requires that a macro
  39.   be only one line long (the \ is the line
  40.   continuation character).
  41. *****************************************************/
  42.  
  43.  
  44. /*****************************************************
  45. Turn the Data Terminal Ready signal on
  46. *****************************************************/
  47. #define RAISE_DTR {                                   \
  48.    /* Read Modem Control Register */                  \
  49.    value_from_port = inp(p_cur_port_info->            \
  50.         base_address + MODEM_CONTROL_REGISTER);       \
  51.                                                       \
  52.    /* Delay for port to catch up */                   \
  53.    IO_DELAY(2);                                       \
  54.                                                       \
  55.    /* Output the Modem Control Register Value with */ \
  56.    /* the DTR bit activated */                        \
  57.    outp(p_cur_port_info->base_address +               \
  58.         MODEM_CONTROL_REGISTER,                       \
  59.         (value_from_port | 0x01) );                   \
  60. } 
  61.  
  62.  
  63. /*****************************************************
  64. Turn the Data Terminal Ready signal off 
  65. *****************************************************/
  66. #define DROP_DTR {                                    \
  67.    /* Read Modem Control Register */                  \
  68.    value_from_port = inp(p_cur_port_info->            \
  69.         base_address + MODEM_CONTROL_REGISTER);       \
  70.                                                       \
  71.    /* Delay for port to catch up */                   \
  72.    IO_DELAY(2);                                       \
  73.                                                       \
  74.    /* Output the Modem Control Register Value with */ \
  75.    /* the DTR bit deactivated */                      \
  76.    outp(p_cur_port_info->base_address +               \
  77.         MODEM_CONTROL_REGISTER,                       \
  78.         (value_from_port & 0xFE));                    \
  79. } 
  80.  
  81.  
  82. /*****************************************************
  83. Turn the Request To Send signal on
  84. *****************************************************/
  85. #define RAISE_RTS {                                   \
  86.    /* Read Modem Control Register */                  \
  87.    value_from_port = inp(p_cur_port_info->            \
  88.         base_address + MODEM_CONTROL_REGISTER);       \
  89.                                                       \
  90.    /* Delay for port to catch up */                   \
  91.    IO_DELAY(2);                                       \
  92.                                                       \
  93.    /* Output the Modem Control Register Value with */ \
  94.    /* the RTS bit activated */                        \
  95.    outp(p_cur_port_info->base_address +               \
  96.         MODEM_CONTROL_REGISTER,                       \
  97.         (value_from_port | 0x02) );                   \
  98. } 
  99.  
  100.  
  101. /*****************************************************
  102. Turn the Request To Send signal off 
  103. *****************************************************/
  104. #define DROP_RTS {                                    \
  105.    /* Read Modem Control Register */                  \
  106.    value_from_port = inp(p_cur_port_info->            \
  107.         base_address + MODEM_CONTROL_REGISTER);       \
  108.                                                       \
  109.    /* Delay for port to catch up */                   \
  110.    IO_DELAY(2);                                       \
  111.                                                       \
  112.    /* Output the Modem Control Register Value with */ \
  113.    /* the RTS bit deactivated */                      \
  114.    outp(p_cur_port_info->base_address +               \
  115.         MODEM_CONTROL_REGISTER,                       \
  116.         (value_from_port & 0xFD));                    \
  117. } 
  118.  
  119.  
  120. /*****************************************************
  121. Force a Transmit Holding Register Emtpy interrupt to
  122. be generated now if the transmitter is empty.
  123. *****************************************************/
  124. #define BOUNCE_THRE {                                 \
  125.    /* Disable THRE interrupt */                       \
  126.    outp(p_cur_port_info->base_address +               \
  127.         INTERRUPT_ENABLE_REGISTER,0x0D);              \
  128.                                                       \
  129.    /* Delay for port to catch up */                   \
  130.    IO_DELAY(3);                                       \
  131.                                                       \
  132.    /* Re-enable THRE interrupt */                     \
  133.    outp(p_cur_port_info->base_address +               \
  134.         INTERRUPT_ENABLE_REGISTER,0x0F);              \
  135.                                                       \
  136.    /* Delay for port to catch up */                   \
  137.    IO_DELAY(2);                                       \
  138. }
  139.  
  140.  
  141.